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The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT147 9-input priority encoders accept data from nine active LOW inputs (A0 to A8) and provide a binary representation on the four active LOW outputs (Y0 to Y3). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line A8 having the highest priority. The devices provide the 10-line to 4-line priority encoding function by use of the implied decimal zero. The zero is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.
74HC147 datasheet
The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT147 9-input priority encoders accept data from nine active LOW inputs (A0 to A8) and provide a binary representation on the four active LOW outputs (Y0 to Y3). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line A8 having the highest priority. The devices provide the 10-line to 4-line priority encoding function by use of the implied decimal zero. The zero is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.
74HC147 datasheet
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